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lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 lmr64010 simple switcher ? 40vout, 1a step-up voltage regulator in sot-23 check for samples: lmr64010 1 features description the lmr64010 switching regulators is a current- 2 ? input voltage range of 2.7v to 14v mode boost converter operating at a fixed frequency ? output voltage up to 40v of 1.6 mhz. ? switch current up to 1a the use of sot-23 package, made possible by the ? 1.6 mhz switching frequency minimal power loss of the internal 1a switch, and use ? low shutdown iq, < 1 a of small inductors and capacitors result in the industry's highest power density. the 40v internal ? cycle-by-cycle current limiting switch makes these solutions perfect for boosting to ? internally compensated voltages of 16v or greater. ? sot-23-5 packaging (2.92 x 2.84 x 1.08mm) these parts have a logic-level shutdown pin that can ? fully enabled for webench ? power designer be used to reduce quiescent current and extend battery life. performance benefits protection is provided through cycle-by-cycle current ? extremely easy to use limiting and thermal shutdown. internal compensation simplifies design and reduces component count. ? tiny overall solution reduces system cost applications ? boost conversions from 3.3v, 5v, and 12v rails ? space constrained applications ? embedded systems ? lcd displays ? led applications system performance 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 all trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2011 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com top view figure 1. 5-lead sot-23 package see package number dbv0005a pin descriptions pin name function 1 sw drain of the internal fet switch. 2 gnd analog and power ground. 3 fb feedback point that connects to external resistive divider. 4 shdn shutdown control input. connect to v in if this feature is not used. 5 v in analog and power input. 2 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010 lmr64010 sw fb gnd v in shdn u1 r3 51k shdn gnd 5v in c1 2.2 p f l1/10 p h r2 13.3k cf 120 pf d1 r1/205k c2 4.7 p f 20v out 170 ma (typ)
formula: if power dissipation exceeds the maximum specified above, the internal thermal protection lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. absolute maximum ratings (1) (2) storage temperature range ? 65 c to +150 c operating junction temperature range ? 40 c to +125 c lead temp. (soldering, 5 sec.) 300 c power dissipation (3) internally limited fb pin voltage ? 0.4v to +6v sw pin voltage ? 0.4v to +40v input supply voltage ? 0.4v to +14.5v shdn pin voltage ? 0.4v to vin + 0.3v j-a (sot-23-5) 265 c/w esd rating (4) human body model 2 kv machine model 200v for soldering specifications: http://www.ti.com/lit/snoa549 (1) absolute maximum ratings indicate limits beyond which damage to the component may occur. electrical specifications do not apply when operating the device outside of the limits set forth under the operating ratings which specify the intended range of operating conditions. (2) if military/aerospace specified devices are required, please contact the texas instruments sales office/ distributors for availability and specifications. (3) the maximum power dissipation which can be safely dissipated for any application is a function of the maximum junction temperature, t j (max) = 125 c, the junction-to-ambient thermal resistance for the sot-23 package, j-a = 265 c/w, and the ambient temperature, t a . the maximum allowable power dissipation at any ambient temperature for designs using this device can be calculated using the circuitry will protect the device by reducing the output voltage as required to maintain a safe junction temperature. (4) the human body model is a 100 pf capacitor discharged through a 1.5 k ? resistor into each pin. the machine model is a 200 pf capacitor discharged directly into each pin. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: lmr64010
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com electrical characteristics limits in standard typeface are for t j = 25 c, and limits in boldface type apply over the full operating temperature range ( ? 40 c t j +125 c). unless otherwise specified: v in = 5v, v shdn = 5v, i l = 0a. parameter test conditions min (1) typ (2) max (1) units v in input voltage 2.7 14 v i sw switch current limit see (3) 1.0 1.5 a r ds (on) switch on resistance i sw = 100 ma 500 650 m ? shdn th shutdown threshold device on 1.5 v device off 0.50 i shdn shutdown pin bias current v shdn = 0 0 a v shdn = 5v 0 2 v fb feedback pin reference voltage v in = 3v 1.205 1.230 1.255 v i fb feedback pin bias current v fb = 1.23v 60 na i q quiescent current v shdn = 5v, switching 2.1 3.0 ma v shdn = 5v, not switching 400 500 a v shdn = 0 0.024 1 v fb fb voltage line regulation 2.7v v in 14v 0.02 %/v v in f sw switching frequency 1.15 1.6 1.85 mhz d max maximum duty cycle 87 93 % i l switch leakage not switching v sw = 5v 1 a (1) limits are ensuredd by testing, statistical correlation, or design. (2) typical values are derived from the mean value of a large quantity of samples tested during characterization and represent the most likely expected value of the parameter at room temperature. (3) switch current limit is dependent on duty cycle (see typical performance characteristics ). limits shown are for duty cycles 50%. 4 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 typical performance characteristics unless otherwise specified: v in = 5v, shdn pin is tied to v in . iq v in (active) vs temperature oscillator frequency vs temperature figure 2. figure 3. max. duty cycle vs temperature feedback voltage vs temperature figure 4. figure 5. r ds (on) vs temperature current limit vs temperature figure 6. figure 7. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: lmr64010 -40 -25 0 25 50 75 100 125 temperature ( o c) 92.7 92.8 92.9 93.0 93.1 93.2 93.3 93.4 max duty cycle (%)
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com typical performance characteristics (continued) unless otherwise specified: v in = 5v, shdn pin is tied to v in . r ds(on) vs v in efficiency vs load current (v out = 12v) figure 8. figure 9. efficiency vs load current (v out = 15v) efficiency vs load current (v out = 20v) figure 10. figure 11. efficiency vs load current (v out = 25v) efficiency vs load current (v out = 30v) figure 12. figure 13. 6 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010 0 50 100 150 200 250 300 350 0 10 20 30 40 50 60 70 80 90 100 v in = 10v v in = 5v load current (ma) efficiency (%) 0 50 100 150 200 250 300 350 400 0 10 20 30 40 50 60 70 80 90 100 v in = 10v v in = 5v load current (ma) efficiency (%) load current (ma) efficiency (%) 0 200 400 600 800 1000 0 10 20 30 40 50 60 70 80 90 100 v in = 10v v in = 5v v in = 3.3v 0 100 200 300 400 500 600 700 0 10 20 30 40 50 60 70 80 90 100 v in = 10v v in = 5v v in = 3.3v load current (ma) efficiency (%)
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 typical performance characteristics (continued) unless otherwise specified: v in = 5v, shdn pin is tied to v in . efficiency vs load current (v out = 35v) efficiency vs load current (v out = 40v) figure 14. figure 15. block diagram copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: lmr64010 0 50 100 150 200 0 10 20 30 40 50 60 70 80 90 100 v in = 10v load current (ma) efficiency (%) 0 50 100 150 200 load current (ma) efficiency (%) 0 10 20 30 40 50 60 70 80 90 v in =10v
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com application information theory of operation the lmr64010 is a switching converter ic that operates at a fixed frequency (1.6 mhz) using current-mode control for fast transient response over a wide input voltage range and incorporates pulse-by-pulse current limiting protection. because this is current mode control, a 50 m ? sense resistor in series with the switch fet is used to provide a voltage (which is proportional to the fet current) to both the input of the pulse width modulation (pwm) comparator and the current limit amplifier. at the beginning of each cycle, the s-r latch turns on the fet. as the current through the fet increases, a voltage (proportional to this current) is summed with the ramp coming from the ramp generator and then fed into the input of the pwm comparator. when this voltage exceeds the voltage on the other input (coming from the gm amplifier), the latch resets and turns the fet off. since the signal coming from the gm amplifier is derived from the feedback (which samples the voltage at the output), the action of the pwm comparator constantly sets the correct peak current through the fet to keep the output volatge in regulation. q1 and q2 along with r3 - r6 form a bandgap voltage reference used by the ic to hold the output in regulation. the currents flowing through q1 and q2 will be equal, and the feedback loop will adjust the regulated output to maintain this. because of this, the regulated output is always maintained at a voltage level equal to the voltage at the fb node "multiplied up" by the ratio of the output resistive divider. the current limit comparator feeds directly into the flip-flop, that drives the switch fet. if the fet current reaches the limit threshold, the fet is turned off and the cycle terminated until the next clock pulse. the current limit input terminates the pulse regardless of the status of the output of the pwm comparator. application hints selecting the external capacitors the best capacitors for use with the lmr64010 are multi-layer ceramic capacitors. they have the lowest esr (equivalent series resistance) and highest resonance frequency which makes them optimum for use with high frequency switching converters. when selecting a ceramic capacitor, only x5r and x7r dielectric types should be used. other types such as z5u and y5f have such severe loss of capacitance due to effects of temperature variation and applied voltage, they may provide as little as 20% of rated capacitance in many typical applications. always consult capacitor manufacturer ? s data curves before selecting a capacitor. selecting the output capacitor a single ceramic capacitor of value 4.7 f to 10 f will provide sufficient output capacitance for most applications. for output voltages below 10v, a 10 f capacitance is required. if larger amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can be used in parallel with the ceramics. aluminum electrolytics with ultra low esr such as sanyo oscon can be used, but are usually prohibitively expensive. typical ai electrolytic capacitors are not suitable for switching frequencies above 500 khz due to significant ringing and temperature rise due to self-heating from ripple current. an output capacitor with excessive esr can also reduce phase margin and cause instability. selecting the input capacitor an input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each time the switch turns on. this capacitor must have extremely low esr, so ceramic is the best choice. we recommend a nominal value of 2.2 f, but larger values can be used. since this capacitor reduces the amount of voltage ripple seen at the input pin, it also reduces the amount of emi passed back along that line to other circuitry. 8 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 feed-forward compensation although internally compensated, the feed-forward capacitor cf is required for stability (see basic application circuit ). adding this capacitor puts a zero in the loop response of the converter. without it, the regulator loop can oscillate. the recommended frequency for the zero fz should be approximately 8 khz. cf can be calculated using the formula: cf = 1 / (2 x x r1 x fz) (1) selecting diodes the external diode used in the typical application should be a schottky diode. if the switch voltage is less than 15v, a 20v diode such as the mbr0520 is recommended. if the switch voltage is between 15v and 25v, a 30v diode such as the mbr0530 is recommended. if the switch voltage exceeds 25v, a 40v diode such as the mbr0540 should be used. the mbr05xx series of diodes are designed to handle a maximum average current of 0.5a. for applications exceeding 0.5a average but less than 1a, a toshiba crs08 can be used. layout hints high frequency switching regulators require very careful layout of components in order to get stable operation and low noise. all components must be as close as possible to the lmr64010 device. it is recommended that a 4-layer pcb be used so that internal ground planes are available. as an example, a recommended layout of components is shown: figure 16. recommended pcb component layout some additional guidelines to be observed: 1. keep the path between l1, d1, and c2 extremely short. parasitic trace inductance in series with d1 and c2 will increase noise and ringing. 2. the feedback components r1, r2 and cf must be kept close to the fb pin of u1 to prevent noise injection on the fb pin trace. 3. if internal ground planes are available (recommended) use vias to connect directly to ground at pin 2 of u1, as well as the negative sides of capacitors c1 and c2. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: lmr64010
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com setting the output voltage the output voltage is set using the external resistors r1 and r2 (see basic application circuit ). a value of approximately 13.3 k ? is recommended for r2 to establish a divider current of approximately 92 a. r1 is calculated using the formula: r1 = r2 x (v out /1.23 ? 1) (2) figure 17. basic application circuit duty cycle the maximum duty cycle of the switching regulator determines the maximum boost ratio of output-to-input voltage that the converter can attain in continuous mode of operation. the duty cycle for a given boost application is defined as: (3) this applies for continuous mode operation. the equation shown for calculating duty cycle incorporates terms for the fet switch voltage and diode forward voltage. the actual duty cycle measured in operation will also be affected slightly by other power losses in the circuit such as wire losses in the inductor, switching losses, and capacitor ripple current losses from self-heating. therefore, the actual (effective) duty cycle measured may be slightly higher than calculated to compensate for these power losses. a good approximation for effctive duty cycle is : dc (eff) = (1 - efficiency x (v in /v out )) where ? the efficiency can be approximated from the curves provided. (4) inductance value the first question we are usually asked is: ? how small can i make the inductor? ? (because they are the largest sized component and usually the most costly). the answer is not simple and involves tradeoffs in performance. larger inductors mean less inductor ripple current, which typically means less output voltage ripple (for a given size of output capacitor). larger inductors also mean more load power can be delivered because the energy stored during each switching cycle is: e =l/2 x (lp) 2 where ? ? lp ? is the peak inductor current. (5) 10 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010 duty cycle = v out + v diode - v in v out + v diode - v sw
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 an important point to observe is that the lmr64010 will limit its switch current based on peak current. this means that since lp(max) is fixed, increasing l will increase the maximum amount of power available to the load. conversely, using too little inductance may limit the amount of load current which can be drawn from the output. best performance is usually obtained when the converter is operated in ? continuous ? mode at the load current range of interest, typically giving better load regulation and less output ripple. continuous operation is defined as not allowing the inductor current to drop to zero during the cycle. it should be noted that all boost converters shift over to discontinuous operation as the output load is reduced far enough, but a larger inductor stays ? continuous ? over a wider load current range. to better understand these tradeoffs, a typical application circuit (5v to 12v boost with a 10 h inductor) will be analyzed. we will assume: v in = 5v, v out = 12v, v diode = 0.5v, v sw = 0.5v since the frequency is 1.6 mhz (nominal), the period is approximately 0.625 s. the duty cycle will be 62.5%, which means the on time of the switch is 0.390 s. it should be noted that when the switch is on, the voltage across the inductor is approximately 4.5v. using the equation: v = l (di/dt) (6) we can then calculate the di/dt rate of the inductor which is found to be 0.45 a/ s during the on time. using these facts, we can then show what the inductor current will look like during operation: figure 18. 10 h inductor current,5v ? 12v boost during the 0.390 s on time, the inductor current ramps up 0.176a and ramps down an equal amount during the off time. this is defined as the inductor ? ripple current ? . it can also be seen that if the load current drops to about 33 ma, the inductor current will begin touching the zero axis which means it will be in discontinuous mode. a similar analysis can be performed on any boost converter, to make sure the ripple current is reasonable and continuous operation will be maintained at the typical load current values. figure 19. typical application, 5v ? 12v boost copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: lmr64010 lmr64010 sw fb gnd v in shdn u1 r3 51k shdn gnd 5v in c1 2.2 p f r2 13.3k cf 220 pf d1 mbr0520 r1/117k l1/10 p h c2 4.7 p f 12v out 330 ma (typ)
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com maximum switch current the maximum fet swtch current available before the current limiter cuts in is dependent on duty cycle of the application. this is illustrated in the graphs below which show both the typical and specified values of switch current as a function of effective (actual) duty cycle: figure 20. switch current limit vs duty cycle calculating load current as shown in the figure which depicts inductor current, the load current is related to the average inductor current by the relation: i load = i ind (avg) x (1 - dc) where ? "dc" is the duty cycle of the application. (7) i sw = i ind (avg) + ? (i ripple ) (8) inductor ripple current is dependent on inductance, duty cycle, input voltage and frequency: i ripple = dc x (v in -v sw ) / (f x l) (9) combining all terms, we can develop an expression which allows the maximum available load current to be calculated: (10) 12 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010 i load (max) = (1 - dc) x (i sw (max) - dc (v in - v sw )) 2fl 0 20 40 60 80 100 0 200 400 600 800 1000 1200 1400 1600 switch current limit (ma) duty cycle (%) = [1 - eff*(vin/vout))] v in = 5v v in = 3.3v v in = 2.7v
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 the equation shown to calculate maximum load current takes into account the losses in the inductor or turn-off switching losses of the fet and diode. for actual load current in typical applications, we took bench data for various input and output voltages and displayed the maximum load current available for a typical device in graph form: figure 21. max. load current vs v in design parameters v sw and i sw the value of the fet "on" voltage (referred to as v sw in the equations) is dependent on load current. a good approximation can be obtained by multiplying the "on resistance" of the fet times the average inductor current. fet on resistance increases at v in values below 5v, since the internal n-fet has less gate voltage in this input voltage range (see typical performance characteristics curves). above v in = 5v, the fet gate voltage is internally clamped to 5v. the maximum peak switch current the device can deliver is dependent on duty cycle. the minimum value is specified to be > 1a at duty cycle below 50%. for higher duty cycles, see typical performance characteristics curves. thermal considerations at higher duty cycles, the increased on time of the fet means the maximum output current will be determined by power dissipation within the lmr64010 fet switch. the switch power dissipation from on-state conduction is calculated by: p (sw) = dc x i ind (ave) 2 x r ds on (11) there will be some switching losses as well, so some derating needs to be applied when calculating ic power dissipation. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: lmr64010
lmr64010 snvs736b ? september 2011 ? revised april 2013 www.ti.com minimum inductance in some applications where the maximum load current is relatively small, it may be advantageous to use the smallest possible inductance value for cost and size savings. the converter will operate in discontinuous mode in such a case. the minimum inductance should be selected such that the inductor (switch) current peak on each cycle does not reach the 1a current limit maximum. to understand how to do this, an example will be presented. in the example, minimum switching frequency of 1.15 mhz will be used. this means the maximum cycle period is the reciprocal of the minimum frequency: t on(max) = 1/1.15m = 0.870 s (12) we will assume the input voltage is 5v, v out = 12v, v sw = 0.2v, v diode = 0.3v. the duty cycle is: duty cycle = 60.3% therefore, the maximum switch on time is 0.524 s. an inductor should be selected with enough inductance to prevent the switch current from reaching 1a in the 0.524 s on time interval (see below): figure 22. discontinuous design, 5v ? 12v boost the voltage across the inductor during on time is 4.8v. minimum inductance value is found by: v = l x dl/dt, l = v x (dt/dl) = 4.8 (0.524 /1) = 2.5 h (13) in this case, a 2.7 h inductor could be used assuming it provided at least that much inductance up to the 1a current value. this same analysis can be used to find the minimum inductance for any boost application. when selecting an inductor, make certain that the continuous current rating is high enough to avoid saturation at peak currents. a suitable core type must be used to minimize core (switching) losses, and wire power losses must be considered when selecting the current rating. shutdown pin operation the device is turned off by pulling the shutdown pin low. if this function is not going to be used, the pin should be tied directly to v in . if the shdn function will be needed, a pull-up resistor must be used to v in (approximately 50k-100k ? recommended). the shdn pin must not be left unterminated. 14 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: lmr64010
lmr64010 www.ti.com snvs736b ? september 2011 ? revised april 2013 revision history changes from revision a (april 2013) to revision b page ? changed layout of national data sheet to ti format .......................................................................................................... 14 copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: lmr64010
package option addendum www.ti.com 11-apr-2013 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples lmr64010xmf/nopb active sot-23 dbv 5 1000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 sf9b lmr64010xmfe/nopb active sot-23 dbv 5 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 sf9b lmr64010xmfx/nopb active sot-23 dbv 5 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 sf9b (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) multiple top-side markings will be inside parentheses. only one top-side marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire top-side marking for that device. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant lmr64010xmf/nopb sot-23 dbv 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 q3 lmr64010xmfe/nopb sot-23 dbv 5 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 q3 lmr64010xmfx/nopb sot-23 dbv 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 q3 package materials information www.ti.com 8-apr-2013 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) lmr64010xmf/nopb sot-23 dbv 5 1000 210.0 185.0 35.0 lmr64010xmfe/nopb sot-23 dbv 5 250 210.0 185.0 35.0 lmr64010xmfx/nopb sot-23 dbv 5 3000 210.0 185.0 35.0 package materials information www.ti.com 8-apr-2013 pack materials-page 2

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